1. Field of the Invention
The invention disclosed in this specification relates to a semiconductor device using a semiconductor element.
2. Description of the Related Art
Storage devices using semiconductor elements are broadly classified into two categories: a volatile device that loses stored data when power supply stops, and a non-volatile device that retains stored data even when power is not supplied.
A typical example of a volatile storage device is a DRAM (dynamic random access memory). A memory cell which is a key component in a DRAM includes a read and write transistor and a capacitor.
Circuit patterns for DRAMs, like those for other semiconductor integrated circuits, have been increasingly miniaturized in accordance with the scaling law. However, in a transistor having a channel length of 100 nm or less, a punch-through current is likely to flow due to a short-channel effect and the transistor becomes incapable of functioning as a switching element, which has been considered to be a problem. In order to prevent a punch-through current, a method in which a silicon substrate is doped with an impurity at high concentration is given. This method makes a junction leakage current likely to flow between a source and the substrate or between a drain and the substrate and eventually causes deterioration of memory retention characteristics. Therefore, the method is not an appropriate solution to the problem.
Against such a problem, a method has been considered for reducing the area occupied by one memory cell and also maintaining an effective channel length so as not to cause a short-channel effect by forming a three-dimensional transistor in the memory cell. Disclosed is one example of a structure in which a U-shaped vertically long groove is formed in a region where a channel portion of a transistor is formed, a gate insulating film is formed along a wall surface in the groove, and a gate electrode is formed so as to fill the groove (see Non-Patent Document 1).
A transistor having a channel portion of such a structure has a long effective channel length because a current flows between a source region and a drain region via an indirect route across the groove portion. This provides an advantageous effect of reducing the area occupied by a transistor in a memory cell and suppressing a short-channel effect.
However, a conventional DRAM needs to be refreshed at an interval of several tens of milliseconds to hold data, which results in large power consumption. In addition, a transistor therein is frequently turned on and off; thus, deterioration of the transistor is also a problem. These problems become significant as the memory capacity increases and transistor miniaturization advances.
Further, a typical example of a non-volatile memory device is a flash memory. A flash memory includes a floating gate between a gate electrode and a channel formation region in a transistor and stores data by holding electric charge in the floating gate. Therefore, a flash memory has advantages in that the data holding time is extremely long (almost permanent) and refresh operation which is necessary in a volatile storage device is not needed (e.g., see Patent Document 1).
However, a gate insulating layer included in a storage element deteriorates by tunneling current generated in writing, so that the storage element stops its function after a predetermined number of writing operations. In order to reduce adverse effects of this problem, a method in which the number of writing operations for storage elements is equalized is employed, for example. However, a complicated peripheral circuit is needed to realize this method. Moreover, employing such a method does not solve the fundamental problem of lifetime. In other words, a flash memory is not suitable for applications in which data is frequently rewritten.
In addition, high voltage is necessary for holding of charge in the floating gate or removal of the charge, and a circuit for generating high voltage is also necessary. Further, it takes a relatively long time to hold or remove charge, so that it is not easy to increase the speed of write and erase operations.